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Previous EIS seminars 2010




December 1 Dan Hammerstrom's ongoing research.
  "... the NSF grant, the collaboration he's doing with Jeff Hawkins at Numenta, the status of the DARPA SyNAPSE program, and the Intel project." Discussion.
  The Role of Embedded Computing in Renewable Energy and Sustainability - The View from Oregon, USA
  Prof. Dan Hammerstrom gave a talk about the importance of embedded computing in green technologies, especially those dealing with power conversion and storage, Smart Grid, and transportation.
November 30 Electric Vehicles. Overview on the electric vehicle course and the various EV programs at PSU and in Portland. Discussion about possible collaboration.
  Dan Hammerstrom
  Dan is a professor at the Electrical and Computer Engineering Department and associate Dean at Maseeh College of Engineering and Computer Science Portland state university, Portland, Oregon, USA
November 25 Docent lecture: "Wireless Communications in Factory Automation and Traffic Safety Applications"
  Dr. Elisabeth Uhlemann
October 12 Workshop on Wireless Vehicular Communcationsopens in new window
October 5 Guest talk: Conditional Partial Plans for Rational Situated Agents Capable of Deductive Reasoning and Inductive Learning
  By dr. Slawomir Nowaczyk, AGH University of Science and technology, Krakow, Poland
Abstract: Rational, autonomous agents that are able to achieve their goals in dynamic, partially observable environments are the ultimate dream of Artificial Intelligence research since its beginning. In my talk I will be presenting my own "quest" towards this goal, focusing mostly on the development and evaluation of a framework I have proposed that is well suited for creating intelligent agents able to learn from experience.
  I believe that one of the crucial challenges is to ensure smooth interactions between the agent's internal reasoning mechanism and the learning system used to improve its behaviour. Acting rationally in adverse environments that are only partially known cannot be achieved in any other way. I will describe a methodology I have developed where the agent creates several different conditional partial plans and reasons about the potential usefulness of each one. Furthermore, it generalises its experience in order to solve subsequent, similar problem instances more effectively.
Sept. 30 - Oct. 1 Visit from St Petersburg State University and University of Turku about future cooperation.
  Dmitry Koznov, Iakov Kirilenko and Kira Vyatkina from St Petersburg State University and Timo Knuutila from Turku University.
  Link to the programmePDF (pdf, 47.4 kB)
September 20  Seminar: Power consumption estimation for H.264/AVC and DVC for WSN
  Ann Ukhanova from Technical University of Denmark
Abstract: Wireless sensor networks (WSN) are rapidly emerging as a framework to carry out distributed and pervasive applications such as environmental monitoring, habitat studies, and video-surveillance, just to mention a few. Such networks typically consist of tens to hundreds of small-size and low-cost nodes. Each node is equipped with a sensing device that collects information from the environment (e.g., temperature, vibrations, images), and transmits it through the network to a gateway node. Wireless video-surveillance networks (WVN) are gaining increasing popularity due to the number of applications they make possible to carry out.
  So, during the last years of video codec development more and more attention has been paid to the low-complexity codecs, as they are considered now to be used in these wireless sensor networks and another systems, where it is necessary to decrease encoding power consumption so that they can achieve longer working time, and the decoder power consumption for this system is not an important issue. Energy consumption is a critical aspect, even more than in other sensor networks since video cameras collect a huge amount of data that must be transmitted over the wireless link. Therefore, power consumption on the encoder side became one of the most important issues along with compression efficiency.
  Ann also shortly presented the FRUCT program ( ).external link, opens in new window
June 1 Lecture by professor Mikhail Babich from the Max-Plan institute in Bonn, Germany
  "On birational symplectic fibrations of co-adjoint orbits of GL(N,C)"
May 28 Andreas Olofsson from Adapteva Inc., in Lexington, MA, USA will give a presentation of the technology developed by the company.
  Adapteva has developed a revolutionary embedded computing platform for applications requiring ultra high processing performance and minimal power consumption. Andreas Olofsson is the chief architect and VLSI designer.
  Link to the Adapteva's information on the webexternal link, opens in new window
Abstract: This paper presents a hybrid approach to high performance embedded computing that uses FPGAs, general purpose processors and a novel floating point accelerator to push the limits of energy efficiency while keeping with today's well known programming languages and tools. A floating point accelerator has been designed, containing 16 independent ANSI C-programmable processors cores, a high throughput Network-On-Chip and low power FPGA data links. The accelerator chip demonstrates a processing efficiency of 25 GFLOPS/W, and a maximum sustained performance of 32 GFLOPS while operating at 1 GHz.
May 27 Dr. Edwin Westbrook from Rice university in Texas, USA GAVE a short informal talk about his researchexternal link, opens in new window
May 24 Seminar by Anders Kaestner, Neutron Imaging and Activation Group, Paul Scherrer Institute, Switzerland
  "Neutron Imaging at Paul Scherrer Institute"PDF (pdf, 630.8 kB)
  Björn Nilsson presented his ph.d. thesis "Energy Efficient Protocols for Active RFID"PDF (pdf, 120 kB)
May 19 Gordon Ononiwu presented the paper No Silver Bullet: Essence and Accidents of Software Engineeringexternal link, opens in new window
  Written by F. Brooks
  This presentation is part of the course Classical Papers in Computer Science and Engineering
May 5 Wagner Ourique de Morais presented the following papers by David Parnas
  Software Aspects of Strategic Defense Systemsexternal link, opens in new window
  On the Criteria to be Used in Decomposing Systems into Modulesexternal link, opens in new window
  This presentation is part of the course Classical Papers in Computer Science and Engineering
  Information about David Parnasexternal link, opens in new window
April 13 Low power and low silicon cost parallel DSP computing platform for future communications and media
  Seminar with professor Dake Liu from Linköping university
Abstract: Parallel stream computing is essential for communications such as baseband DSP for radio handset, radio base station, broadband cable terminal, and broadband cable infrastructure. It is also essential for media such as HDTV codec, video game, gateway etc. Linköping University has been working on ePUMA (embedded Parallel DSP platform with Unique Memory Access) funded by SSF. The research covers parallel programming, programming toolchain, architecture, and microarchitecture. To create an instruction set architecture with sufficient function coverage and high performance, applications such as radio base station, mobile phone baseband, cable modem, video codec, image codec, and video games were analyzed. The preliminary benchmarking is much better than STI CELL. We are expecting cooperations with Halmstad University.
About Dake: Dake Liu is Professor of Computer Engineering Division at the Department of Electrical Engineering of Linköping University, Sweden, He is IEEE senior member. Dake published more than 100 papers on journals and international conferences during 2000-2010; and he holds 5 US patents. The focus of Dake’s research is design and implementation of parallel and reconfigurable and low power architectures, on chip multi-processors, and ASIP (application specific instruction set processors) for embedded computing. Dake is an experienced researcher of processors for communications and media digital signal processing. Dake has also experiences in design of communication systems, design of Radio frequency CMOS integrated circuits. Dake Liu is the co-founder of Coresonic AB <> Linköping Sweden and the co-founder of FreehandDSP AB Stockholm Sweden. Coresonic is a leading company offering solutions for software defined radio and baseband solutions for future radio handsets. FreehadDSP was successfully acquired by VIA technologies <> in 2001.
April 9 Why functional programming matters
  Paper, written by John Hughes, presented by Yan Wang as part of the course Classical Papers in Computer Science and Engineering
March 31 Graph-Based Algorithms for Boolean Function Manipulation
  Paper, written by Randal Bryant, presented by Jens Lundström as part of the course Classical Papers in Computer Science and Engineering
March 29 LLVM - an infrastructure for building compilers - seminar by Veronica Gaspes
  LLVM, the Low Level Abstract Machine, is being widely used in language implementations. It started as an academic project and is now industrially supported. It provides an abstract assembler that can be used as an intermediate representation for code generation, many compiler optimizations as modules and many tools for putting together a compiler. We have now introduced it in the course Computer Languages that we offer for our master students.
March 17 "On Understanding Types, Data Abstraction and Polymorphism" by Luca Cardelli and Peter Wegnerexternal link, opens in new window
  Paper presented by Anita Sant'Anna as part of the course Classical Papers in Computer Science and Engineering
February 18 Seminar with professor Shashi Kumar, School of Engineering at Jönköping university
  Computation-Communication Co-Design for Multi-Core Emedded Systems
Abstract: It is estimated that the majority of embedded systems being built today incorporate more than one processing core. Availability of multiple processors and enormous computing power allows the designer to develop multi-functional products and/or greatly enhance the performance of existing products. Unfortunately, the complexity of designing, programming and analyzing multi-processor systems grows exponentially with the number of processors. An important reason for the growth of this complexity is the requirement of inter-processor communication for parallel processing of tasks on various cores. One way to handle this complexity is by separation of concerns regarding computational aspects and communication aspects of the system. Computational concerns refer to partitioning and scheduling of computational tasks among available processing elements to achieve the required performance and cost (energy consumption) objectives. The communication concerns refer to design and operation of infrastructure to enable exchange of data among processing elements.
  Our research for the last ten years have been focused on handling communication concerns in building such multi-core systems on chip by using a new paradigm called Networks on Chip (NoC). In this talk I will give an overview of our contributions related to various aspects of NoC architecture.
  Although separation of computation and communication concerns has allowed very rapid developments in both areas, development of a real system requires integration of partial solutions from the two domains. If this integration is not properly handled it can result in:
  - the loss of all performance gains achieved separately in the two domains
  - incompatibilities of solutions in two domains which can make the programming and testing of the complete system very time consuming.
  To avoid the above mentioned problems, the best approach will be to design multi-core systems using a Computation-Communication co-design methodology. Co-design envisages a close interaction between processes and tools used for designing these two aspects. The new methodology has a lot to learn from the experience of Hardware-Software co-design methodologies. The Computation-Communication methodology will affect all aspects of multi-core system design including communication architecture design, core selection and mapping, programming, operating system and debugging etc. Development of such a methodology is crucial for improving productivity of multi-core based embedded system.
February 8 Seminar with Zain-ul-Abdin presenting some of the views
  expressed by Prof. Yale N. Patt during a talk titled "Teaching Introductory Computer Architecture and Programming" at HiPEAC 2010 conference in Pisa.
  Yale Patt is Professor of Electrical and Computer Engineering and the Ernest Cockrell, Jr. Centennial Chair in Engineering at The University of Texas at Austin.
  Yale Patt earned his BS at Northeastern University and his MS and PhD at Stanford University, all in electrical engineering. He received the 1995 IEEE Emannuel R. Piore Medal "for contributions to computer architecture leading to commercially viable high performance microprocessors," the 1996 IEEE/ACM Eckert-Mauchly Award "for important contributions to instruction level paralelism and superscalar processor design," and the 1999 IEEE Wallace W. McDowell Award "for your impact on the high performance microprocessor industry via a combination of important contributions to both engineering and education."
  For his teaching, he has received several awards, most notably the ACM Karl V. Karlstrom Outstanding Educator Award for 2000. He also received the 2002 Texas Excellence Teaching Award for the College of Engineering at The University of Texas at Austin. Also, the 2002 Dad's Centennial Fellowship for his commitment to teaching freshmen.
Updated 2008-09-08