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Embedded Parallel Computing - EPC

The 2nd internal EPC Workshop at Halmstad university, Halmstad


October 1, 2008, 09.00 - 16.00

Programme:

9.00  Gathering, Coffee etc

9.30  Thread 1 Stream processing architectures ...

Jerker Bengtsson:
Methodologies and Tools for Development of  Signal Processing Software on Multicore Platforms.PDF (pdf, 205.5 kB)
Followed by discussion
 
10.30 Thread 2 Programming of reconfigurable chip architectures

Zain-ul-Abdin:
Using a CSP Based Programming Model for Reconfigurable Processor ArraysPowerpoint (powerpoint, 601.5 kB).

Zain-ul-Abdin and Per Söderstam:
Experience from the use of Ambric reconfigurable processor array on a chip.
Followed by discussion

11.45 Lunch

13.00 Thread 3 Methods for coordination of signal processing

Tony Larsson:
A two-level approach to embedded software design.
Followed by discussion

14.00 Thread 6 Joint knowledge development within parallel/reconfigurable computingPDF (pdf, 487.9 kB)

Verónica Gaspes suggests a plan for this thread  
Followed by discussion

14.45 Coffee break

15.00 Threads 4, 5 and 7 Shorter reports from activities within these threads

Peter Brauer and Kurt Lind — Multicore days
Anders Åhlander — BenchmarksPowerpoint (powerpoint, 1.7 MB)
Anders Bergåker — Master thesis project
Yan Wang — Project IPSPowerpoint (powerpoint, 1.9 MB)
Magnus Jonsson - ERTCENS

16.00 End of workshop

Updated 2008-10-28